Upgrading the Web-based Chinese-Learning Program Project

In 2003, Dr. Chen developed a web-based program, http://tltc.shu.edu/chen, to target the challenges of learning the Chinese language. This tool facilitates the acquisition of Chinese pronunciation and the writing system for beginners. For over a decade, Dr. Chen and her students, as well as others in the Chinese-learning community, have used this program. While the online program has been functioning well for the instructional purposes, the media files must be updated in order to support mobile learning. Furthermore, copyright considerations will be addressed regarding the integration of existing video clips. The proposed upgrade will be achieved through a collaboration with a graduate student in Asian Studies Program, and the instructional designers at the Teaching, Learning, and Technology Center. The completed product will serve as effective instructional materials for both instructors and learners of Chinese

Algorithms and architectures for decimal transcendental function computation

Nowadays, there are many commercial demands for decimal floating-point (DFP) arithmetic operations such as financial analysis, tax calculation, currency conversion, Internet based applications, and e-commerce. This trend gives rise to further development on DFP arithmetic units which can perform accurate computations with exact decimal operands. Due to the significance of DFP arithmetic, the IEEE 754-2008 standard for floating-point arithmetic includes it in its specifications. The basic decimal arithmetic unit, such as decimal adder, subtracter, multiplier, divider or square-root unit, as a main part of a decimal microprocessor, is attracting more and more researchers' attentions. Recently, the decimal-encoded formats and DFP arithmetic units have been implemented in IBM's system z900, POWER6, and z10 microprocessors. Increasing chip densities and transistor count provide more room for designers to add more essential functions on application domains into upcoming microprocessors. Decimal transcendental functions, such as DFP logarithm, antilogarithm, exponential, reciprocal and trigonometric, etc, as useful arithmetic operations in many areas of science and engineering, has been specified as the recommended arithmetic in the IEEE 754-2008 standard. Thus, virtually all the computing systems that are compliant with the IEEE 754-2008 standard could include a DFP mathematical library providing transcendental function computation. Based on the development of basic decimal arithmetic units, more complex DFP transcendental arithmetic will be the next building blocks in microprocessors. In this dissertation, we researched and developed several new decimal algorithms and architectures for the DFP transcendental function computation. These designs are composed of several different methods: 1) the decimal transcendental function computation based on the table-based first-order polynomial approximation method; 2) DFP logarithmic and antilogarithmic converters based on the decimal digit-recurrence algorithm with selection by rounding; 3) a decimal reciprocal unit using the efficient table look-up based on Newton-Raphson iterations; and 4) a first radix-100 division unit based on the non-restoring algorithm with pre-scaling method. Most decimal algorithms and architectures for the DFP transcendental function computation developed in this dissertation have been the first attempt to analyze and implement the DFP transcendental arithmetic in order to achieve faithful results of DFP operands, specified in IEEE 754-2008. To help researchers evaluate the hardware performance of DFP transcendental arithmetic units, the proposed architectures based on the different methods are modeled, verified and synthesized using FPGAs or with CMOS standard cells libraries in ASIC. Some of implementation results are compared with those of the binary radix-16 logarithmic and exponential converters; recent developed high performance decimal CORDIC based architecture; and Intel's DFP transcendental function computation software library. The comparison results show that the proposed architectures have significant speed-up in contrast to the above designs in terms of the latency. The algorithms and architectures developed in this dissertation provide a useful starting point for future hardware-oriented DFP transcendental function computation researches

The progenitors of type Ia supernovae in the semidetached binaries with red giant donors

Context. The companions of the exploding carbon-oxygen white dwarfs (CO WDs) for producing type Ia supernovae (SNe Ia) are still not conclusively confirmed. A red-giant (RG) star has been suggested to be the mass donor of the exploding WD, named as the symbiotic channel. However, previous studies on the this channel gave a relatively low rate of SNe Ia. Aims. We aim to systematically investigate the parameter space, Galactic rates and delay time distributions of SNe Ia from the symbiotic channel by employing a revised mass-transfer prescription. Methods. We adopted an integrated mass-transfer prescription to calculate the mass-transfer process from a RG star onto the WD. In this prescription, the mass-transfer rate varies with the local material states. Results. We evolved a large number of WD+RG systems, and found that the parameter space of WD+RG systems for producing SNe Ia is significantly enlarged. This channel could produce SNe Ia with intermediate and old ages, contributing to at most 5% of all SNe Ia in the Galaxy. Our model increases the SN Ia rate from this channel by a factor of 5. We suggest that the symbiotic systems RS Oph and T CrB are strong candidates for the progenitors of SNe Ia.Comment: 8 pages, 6 figure